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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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ARINC818 controller Transmitter and Receiver IP core
• ARINC-818 standard support with 1GFC, 2GFC and 4GFC speeds.
• Built-in hierarchical interrupt controller with multiple interrupts from one source tracking.
• Built-in DMA engine.
• Standard 64-bits AMBA 3 AXI Master and APB slave interfaces.
• Big and little endian data support.
• Built-in hierarchical interrupt controller with multiple interrupts from one source tracking.
• Built-in DMA engine.
• Standard 64-bits AMBA 3 AXI Master and APB slave interfaces.
• Big and little endian data support.
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