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Arm Cortex-A32
The Arm® Cortex®-A32 processor is the smallest, lowest-power Armv8-A processor optimized for 32-bit embedded applications. It uses an efficient, 8-stage, in-order pipeline that has been extensively optimised to provide the 32-bit Armv8-A features in the smallest footprint and power.
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Block Diagram of the Arm Cortex-A32 IP Core
Arm IP
- InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
- InCore Azurite Series: 32b/64b RISC-V 2-stage, scalar, in-order, Embedded Processor. RTOS and multi-core capable. Maps upto ARM M-4F. Optimal PPA.
- Quad core IP platform with integrated Arm security subsystem
- ARM HSSTP PHY with Link Layer
- SPI Master / Slave Controller w/FIFO (APB Bus)
- eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)