Audio Sample Rate Converter
The asynchronous mode dynamically estimates the input and output sample rates and adjusts the conversion ratio in real time. This is particularly useful in live audio applications where input and output clocks are not synchronized, such as professional audio mixers, AV receivers, and VoIP systems. The synchronous mode, on the other hand, operates as a fixed-ratio converter, suitable for applications where the sample rate ratio is predetermined, such as high-speed offline processing of stored audio files.
The ASRC Core supports conversion ratios from 1:24 to 24:1, allowing it to process a wide range of industry-standard sample rates, including 8 kHz (telephony), 44.1 kHz (CD quality), 48 kHz (broadcast), and 192 kHz (high-resolution audio). It is capable of handling tens to hundreds of Time-Division Multiplexed (TDM) audio channels, depending on the system clock frequency, making it a scalable solution for multi-channel processing.
A key performance metric of the ASRC Core is its low distortion and noise performance, achieving an average Total Harmonic Distortion Plus Noise (THD+N) of -130 dB, ensuring transparent and high-fidelity audio conversion. By using a linear interpolation method to compute filter coefficients in real time, memory requirements are significantly reduced while still effectively approximating the performance of an ideal, but large, look-up table.
Designed for ease of integration, the ASRC Core supports AMBA® AXI4-Stream interfaces for audio data and multiple control interface options, including AXI-Lite, APB, and a Generic microcontroller interface. It is ready for either ASIC or FPGA implementations, with optimized resource usage to enable deployment in cost-sensitive and power-constrained environments. Interrupt-driven error detection for input overflow, output underflow, and incorrect channel number ensures stable and reliable operation in critical applications.
The comprehensive set of deliverables includes Verilog RTL or netlist, testbenches, simulation scripts, synthesis constraints, and a software driver, making it easy for developers to integrate, verify, and deploy within their systems.
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Block Diagram of the Audio Sample Rate Converter IP Core
