English
You are here:
AXI4-Stream Protocol Checker
The AXI4-Stream Protocol Checker core monitors AXI4-Stream interfaces for protocol violations and provides an indication of which violation occurred.
The checks are synthesizable versions of the System Verilog protocol assertions provided by ARM in the AMBA 4 AXI4, AXI4-Lite, and AXI4-Stream Protocol Assertion User Guide[Ref 2].
The checks are synthesizable versions of the System Verilog protocol assertions provided by ARM in the AMBA 4 AXI4, AXI4-Lite, and AXI4-Stream Protocol Assertion User Guide[Ref 2].
View AXI4-Stream Protocol Checker full description to...
- see the entire AXI4-Stream Protocol Checker datasheet
- get in contact with AXI4-Stream Protocol Checker Supplier
Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC