BCH Encoder/Decoder

Features

• BCH decoder compliant with the DVB-T2/S2 standard.
• Available for Altera/Xilinx FPGA or ASIC implementation.
• High speed design.
• BCH decoder works on GF(2M) where M = 16 or 14 and correctup to T errors where T = 10 or 12.
• Area and power optimized implementation.
• Compatible flexible and easy integrated with other modules.

Block Diagram of the BCH Encoder/Decoder IP Core