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CAN-SEC Acceleration Engine
Arasan’s CAN-SEC Acceleration Engine Core implements the CAN-XL Protocol (CiA 610-1), CAN-XL Addon Part 1-Simple/Extercontent Indication (CiA 613-1), and CAN-XL Addon Part 2-Security (CiA 613- 2) Protocols.
Arasan’s CAN-SEC Acceleration Engine core is easy to integrate with the Host processor using AMBA-APB, AHB_Lite or AMBA-AXI standard interface. This highly configurable design supports programmable Interrupts, data and baud rates, acceptance filters & buffering schemes specific to the application.
Arasan’s CAN-SEC Acceleration Engine core is easy to integrate with the Host processor using AMBA-APB, AHB_Lite or AMBA-AXI standard interface. This highly configurable design supports programmable Interrupts, data and baud rates, acceptance filters & buffering schemes specific to the application.
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Block Diagram of the CAN-SEC Acceleration Engine IP Core
Video Demo of the CAN-SEC Acceleration Engine IP Core
Arasan, a leading provider of semiconductor IP for all things mobile, including automobiles released its 2’nd generation of CAN IP FPGA demo video.