CEI-6G-SR PHY
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Block Diagram of the CEI-6G-SR PHY IP Core
CEI-6G-SR PHY IP
- ONFI 5.0 PHY
- USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
- TSMC CLN4P 4nm DDR5 PHY - 6400Mbps
- Complete USB Type-C Power Delivery PHY, RTL, and Software
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect