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55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
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ChipScope Pro IBERT for 7 Series GTX
The ChipScope™ Pro Integrated Bit Error Ratio Tester (IBERT) core for Kintex®-7 FPGA GTX transceivers is a customizable core that can be used to evaluate and monitor the health of Kintex-7 FPGA GTX transceivers. The design includes pattern generators and checkers implemented in FPGA logic, as well as access to the ports and dynamic reconfiguration port (DRP) attributes of the GTX transceivers.
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