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MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
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D/A Converter IP, 10 bits, RGB channels (3 - ch), 150Msps, current Output, UMC 90nm SP process
10-Bit 150MSPS 3-channel current output Digital-to-Analog converter, UMC 90nm SP/RVT Low-K Logic process.
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ADC/DAC IP
- 12bit 5Gsps silicon proven High performance Current Steering DAC IP Core
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
- 12-bit 12-Gsps Transceiver (ADC/DAC/PLL)
- 8-bit 48-Gsps Transceiver (ADC/DAC/DLL)
- UCIe based 12-bit 12-Gsps Transceiver (ADC/DAC/PLL/UCIe)
- UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)