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DDR Memory Controller IP for low power and high reliability
DDR interface provides full support for the DDR interface, compatible with JESD79F specification and DFI-version 2.0 or higher Specification Compliant. Through its DDR compatibility, it provides a simple interface to a wide range of low-cost devices. DDR IP is proven in FPGA environment. The host interface of the DDR can be simple interface or can be AMBA AHB, AMBA AHB-Lite, AMBA APB, AMBA AXI, AMBA AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or Custom protocol.
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DDR Controller IP IP
- LPDDR5X DDR Memory Controller
- DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP
- Denali Controller for DDR
- ONFI 3.2 NV-DDR2 PHY in GDSII
- High Performance DDR5/4/3 Memory Controller
- SPI FLASH Controller with Execute in place – XIP (SINGLE, DUAL and QUAD SPI Bus Controller with DDR / DTR support and optional AES Encryption)