DDR23/LPDDR23 PHY+Controller in SMIC 28HKD 0.9/2.5V
View DDR23/LPDDR23 PHY+Controller in SMIC 28HKD 0.9/2.5V full description to...
- see the entire DDR23/LPDDR23 PHY+Controller in SMIC 28HKD 0.9/2.5V datasheet
- get in contact with DDR23/LPDDR23 PHY+Controller in SMIC 28HKD 0.9/2.5V Supplier
DDR2 PHY IP
- ONFI 3.2 NV-DDR2 PHY in GDSII
- DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process
- DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device
- DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process
- DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process
- 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process