DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 55nm GP (CLN55GP)

Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully compliant with the DFI 3.1 specification, and features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST).

• see the entire DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 55nm GP (CLN55GP) datasheet
• get in contact with DDRI/II/III SSTL/HSTL combo interface without RTT (square) - TSMC 55nm GP (CLN55GP) Supplier