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RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
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Digital Cell Library Samsung
The agileDSCL is a compact digital standard cell library customisable for specific foundries and processes, and optimised for low-power, ultra-low-leakage, high-density or high-speed applications.
It provides a selection of standard cells with functionalities essential to implement digital designs, with additional power management library to support the implementation of low-power designs.
Please contact Agile Analog to discuss specialised libraries
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable.
Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Samsung Foundry and SMIC as well as other IC foundries and Manufacturers. Please contact Agile Analog for further information.
It provides a selection of standard cells with functionalities essential to implement digital designs, with additional power management library to support the implementation of low-power designs.
Please contact Agile Analog to discuss specialised libraries
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable.
Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Samsung Foundry and SMIC as well as other IC foundries and Manufacturers. Please contact Agile Analog for further information.
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Block Diagram of the Digital Cell Library Samsung IP Core
