English
Ceva-Waves Bluetooth 5.3 Low Energy Baseband Controller, software and profiles
You are here:
Digital Delay Locked Loop (133MHz - 333MHz) - TSMC 90nm GT (CLN90GT)
Dolphin Technology offers a wide range, programmable PLL Compiler designed to provide low jitter across PVT variations. Dolphin also provides a fully digital, high precision DLL solution with a frequency range from 40Mhz to 1Ghz.
View Digital Delay Locked Loop (133MHz - 333MHz) - TSMC 90nm GT (CLN90GT) full description to...
- see the entire Digital Delay Locked Loop (133MHz - 333MHz) - TSMC 90nm GT (CLN90GT) datasheet
- get in contact with Digital Delay Locked Loop (133MHz - 333MHz) - TSMC 90nm GT (CLN90GT) Supplier
programmable PLL IP
- Fractional-N PLL Widely Programmable
- 40-450MHz Programmable Clock Generator PLL, SMIC0.13um
- Programmable CMOS PLL high-frequency divider
- Programmable CMOS PLL high-frequency divider
- TSMC GF Intel Samsung Fractional-N Frequency Synthesizer PLL
- TSMC GF Intel Samsung Integer-N Frequency Synthesizer PLL