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Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
The maximum capacity of the Display Port 1.4 Rx IP Channel is supported. Up to 5.4bps per channel, programmable analogue settings such as CDR Bandwidth, Equalizer Strength, Terminator Resistor, and BGR Voltage are available (HBR2). Furthermore, they provide other testability options like the PLL test alone and the analogue signal monitor.
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Block Diagram of the Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
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