DisplayPort 1.2 Receiver
Features
- Compliant with DisplayPort Standard 1.2
- Main Link supports 1, 2 or 4 lanes at 1.62Gbps, 2.7Gbps and 5.4Gbps
- Enhanced Framing Mode support
- Integrated High-bandwidth Digital Content Protection (HDCP) version 1.4
- Integrated Audio Clock Regeneration
- Deep-Color mode support up to 48-bit RGB/YCbCr Digital Video Output with selectable edge clocking
- Power-down modes
- 2.5V I/O
- Panasonic 65 nm process
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Block Diagram of the DisplayPort 1.2 Receiver IP Core
DisplayPort 1.2 Receiver IP
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP
- Display Port 1.4 Rx PHY & Controller IP (Silicon Proven in IDM 180nm /150nm)
- Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP