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10Gbps Multi-Link and Multi-Protocol PCIe 4.0 PHY IP for SMIC
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Dual-Role Device Controller for USB 3.0
Mature solutions featuring xHCI Host, Device, and Dual-Role
Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, the Cadence® Dual-Role Device Controller IP for USB 3.0 operates in SuperSpeed (5Gbps), High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) modes. The USB 3.0 PHY interface complies with the PHY interface for the PCIe® and USB 3.0 architectures (PIPE) Specification v3.0, while the USB 2.0 PHY interface complies with UTMI+ Specification, Revision 1.0. Combined with Cadence IP for USB Type-C designs, the Cadence Dual-Role Device Controller IP for USB 3.0 provides a complete solution for USB applications that will make use of the new, flexible USB Type-C connector. The Controller IP is silicon-proven, and has been extensively validated with multiple hardware platforms. The Cadence Dual-Role Device Controller IP for USB 3.0 is part of the comprehensive Cadence Design IP portfolio comprised of interface, memory, analog, and system and peripheral IP.
Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, the Cadence® Dual-Role Device Controller IP for USB 3.0 operates in SuperSpeed (5Gbps), High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) modes. The USB 3.0 PHY interface complies with the PHY interface for the PCIe® and USB 3.0 architectures (PIPE) Specification v3.0, while the USB 2.0 PHY interface complies with UTMI+ Specification, Revision 1.0. Combined with Cadence IP for USB Type-C designs, the Cadence Dual-Role Device Controller IP for USB 3.0 provides a complete solution for USB applications that will make use of the new, flexible USB Type-C connector. The Controller IP is silicon-proven, and has been extensively validated with multiple hardware platforms. The Cadence Dual-Role Device Controller IP for USB 3.0 is part of the comprehensive Cadence Design IP portfolio comprised of interface, memory, analog, and system and peripheral IP.
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