Embedded FPGA
The IP contains three modules:
- A Look Up Table (LUT) based programmable core, or FPGA, suitable for mapping generic RTL functions.
- A configuration controller for the interaction between SOC and FPGA system functions such as the loading/checking of the bitstream.
- A Built-In Self-Test for industrial grade manufacturing testing or in-system self-testing.
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Block Diagram of the Embedded FPGA IP Core
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