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RT-660-FPGA DPA-Resistant Hardware Root-of-Trust Security Processor for Govt/Aero/Defense FIPS-140
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Enhanced version of M85C30 Serial Communications Controller
The M85230 is an enhanced version of the Mentor Graphics M85C30 serial communications controller. The enhancements include: a deeper Transmit FIFO (4bytes); a deeper Receive FIFO (8 bytes); a programmable FIFO level for interrupts and DMA requests; latching of Read registers during reads; and automatic forcing of TxD pin high in Mark Idle mode. The M85230 has two independent full-duplex channels which support asynchronous, bit synchronous (SDLC, HDLC and SDLC loop mode) and byte synchronous (MONOSYNC*, BISYNC*) communication modes. NRZ, NRZI and FM data encoding/decoding are supported. It is fully programmable through its 8-bit system interface. Two diagnostic modes - local loop-back and automatic echo - are offered.
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