NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
Entry-level Low-Power 32-bit Processor
For ease of integration in SoC design, it is delivered with a complete softcore development package as well as reference design flow to fit the requirements in all aspects of performance, power consumption, and cost. In addition, N705 is supported by user-friendly development tools, size-optimized MCU libraries and 2-wire low-cost ICE debugger.
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Block Diagram of the Entry-level Low-Power 32-bit Processor IP Core
32-bit IP
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