Aeonic Generate Digital PLL for multi-instance, core logic clocking
ESD Protection
This library is compatible with all 7nm library offerings.
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ESD IP
- on-chip ESD protection
- High speed 3.3V I/0 Library with 8kV ESD protection in TPSCo 65nm technology
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline GlobalFoundries and multi-foundry technologies
- 5V ESD Clamp in GlobalFoundries 180nm LPe
- 5.5V ESD Clamp Cell and 7V HV ESD Protection