eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)

The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI) bus transfers to the standard SPI Master/Slave Controller. The DB-eSPI-SPI-MS contains an AMBA AXI, AHB, or APB Bus Interface for interfacing a microprocessor to external eSPI or SPI Master/Slave devices.
The DB-eSPI-SPI-MS contains both eSPI and SPI Master and Slave functions. Programming the DB-eSPI-SPI-MS lets it communicate with external eSPI or SPI Master or Slaves.

• see the entire eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus) datasheet
• get in contact with eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus) Supplier