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Process Detector (For DVFS and monitoring process variation)
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Ethernet MAC & PCS 10G/25G
Comcores Ethernet MAC and PCS 10G/25G is a silicon agnostic implementation of the IEEE 802.3 standard. The Ethernet MAC IP includes the Reconsiliation Sublayer (RS), and the PCS IP comes with RS-FEC and Base-R-/FC-FEC sublayers. The IP core performs the interconnection between the Physical- and Data-link layer.
The MAC and PCS IP is a low latency cut-through implementation reaching best in market results while still keeping size at a minimum.
The core is richly featured, fully configurable and supports IEEE1588 v2.1 PTP.
The MAC and PCS IP is a low latency cut-through implementation reaching best in market results while still keeping size at a minimum.
The core is richly featured, fully configurable and supports IEEE1588 v2.1 PTP.
View Ethernet MAC & PCS 10G/25G full description to...
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Block Diagram of the Ethernet MAC & PCS 10G/25G IP Core
