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ETR101290 IP core
The ETR101290 IP core allows to check MPEG TS stream conformity to ETSI TR 101 290 V1.4.1 (2020-06)
• ETR101290 is CPU programmable
• It includes all the processing stages to analyze PSI/SI tables and ETR101290 errors
• Each subpart of any priority item can be analyzed or not
• An output event signal can inform a CPU of a new incoming error
• Configurable output UART can log selected detected errors
• ETR101290 is CPU programmable
• It includes all the processing stages to analyze PSI/SI tables and ETR101290 errors
• Each subpart of any priority item can be analyzed or not
• An output event signal can inform a CPU of a new incoming error
• Configurable output UART can log selected detected errors
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Block Diagram of the ETR101290 IP core
