GDDR6X/6 Combo PHY&Controller

Innosilicon GDDR6/6X Combo IP is fully compliant to the JEDEC GDDR6/6X standard, supporting up to 16Gbps per pin for PAM2 GDDR6 and 21Gbps for PAM4 GDDR6X. The GDDR6/6X interface supports 2 channels, each with 16 bits for a total data width of 32 bits per memory device. With Speeds up to 16 Gbps/21Gbps per pin the Innosilicon GDDR6/6X PHY will offer a maximum bandwidth of up to 64 GB/s or 84GB/s per memory device. This PHY will be available in advanced FinFET nodes for leading-edge customer integration. The Innosilicon system-aware design methodology used for IP Cores delivers a customer focused experience with improved time-to-market and first-time-right quality. Innosilicon offers flexible delivery of IP cores and will work directly with the customer to provide a full system signal and power integrity analysis, creating an optimized chip layout. In the end, the customer receives a hard macro solution with a full suite of test software for quick turn-on, characterization and debug.
Innosilicon GDDR6/6X PHY DFI interface is based on DFI 5.0, and customer can license Innosilicon or third-party Memory Controller.

• see the entire GDDR6X/6 Combo PHY&Controller datasheet
• get in contact with GDDR6X/6 Combo PHY&Controller Supplier