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NoC Silicon IP for RISC-V based chips supporting the TileLink protocol
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GLOBALFOUNDRIES 40nm Low Power 1.1v/2.5v APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 300MHz to 900MHz. By setting DM[3:0], DN[6:0] and DP[1:0] to different values according to different CLKIN, CLKOUT will be locked at the multiples of input frequency.
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