MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
H.264/AVC 1080 60p Baseline Profile Decoder
Using TMC's original computer algorithm, we have realized a compact hardware IP that can be mounted on a low-cost FPGA while maintaining high image quality and high performance. It can be used for ASICs as well.
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Block Diagram of the H.264/AVC 1080 60p Baseline Profile Decoder
H.264 IP
- Enhanced Multi-Format Encoder Supporting AV1
- Up To 5 MPixel Multi-Format Encoder
- 4K/ 8K LCEVC Video Decoder
- H.264 High Profiles Encoder - High 10, High 4:2:2 and High 4:4:4 (12 bit 4:2:2 or 4:2:0) Profiles
- H.264 Baseline Encoder with compressed reference frame store
- AV1/HEVC/AVC Single-core Encoder Video IP