Hard-core Tri-mode Ethernet MAC

The HARD_TEMAC described in this document has been designed incorporating the applicable features described in IEEE Std. 802.3-2002. Differences between that specification and the Xilinx HARD_TEMAC implementation are highlighted and explained in the Specification Exceptions section. The HARD_TEMAC is an intellectual property (IP) soft core designed for implementation in a Virtex-4 FX FPGA.

• see the entire Hard-core Tri-mode Ethernet MAC datasheet
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