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HDMI1.4 Transmitter IP
Innosilicon HDMI TX IP is designed for transmitting video and audio data from a video source device to a display device, which is compatible with HDMI1.4 specification. The video resolution is up to 2160P/30Hz.
Innosilicon HDMI TX IP consists of the digital controller and the physical layer. The digital controller receives video, audio, synchronous signals and control signals from SoC logic and outputs encoded data to physical layer.
The physical layer contains 1 clock channel, 3 data channels, PLL, and bias circuit. The clock channel transmits clock signal up to 340MHz to receiver. Each data channel consists of serializer and driver. The serializer converts the parallel input data to 1-bit high speed serial stream and the driver converts the digital serial data to low swing differential signals with typical DC-coupled connection. The data rate is up to 3.4Gbps per channel. PLL generates the clocks required by clock channel, data channels and the digital logic. The bias circuit generates voltage and current reference.
Innosilicon HDMI TX IP offers reliable implementation for HDMI interface, which can be integrated in the SoC used in multimedia device.
Innosilicon HDMI TX IP consists of the digital controller and the physical layer. The digital controller receives video, audio, synchronous signals and control signals from SoC logic and outputs encoded data to physical layer.
The physical layer contains 1 clock channel, 3 data channels, PLL, and bias circuit. The clock channel transmits clock signal up to 340MHz to receiver. Each data channel consists of serializer and driver. The serializer converts the parallel input data to 1-bit high speed serial stream and the driver converts the digital serial data to low swing differential signals with typical DC-coupled connection. The data rate is up to 3.4Gbps per channel. PLL generates the clocks required by clock channel, data channels and the digital logic. The bias circuit generates voltage and current reference.
Innosilicon HDMI TX IP offers reliable implementation for HDMI interface, which can be integrated in the SoC used in multimedia device.
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