High performance, flexible, extendible 32 bit microcontroller core featuring excellent code density
Detailed information can be obtained once a non-disclosue agreement has been signed (NDA).
The entire GNU GCC toolsuite has been ported to this architecture.
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Block Diagram of the High performance, flexible, extendible 32 bit microcontroller core featuring excellent code density
CPU IP
- High Bandwidth Out-of-Order RISC-V CPU IP Core
- Compact, low-power 32-bit RISC CPU
- High-performance 32-bit RISC CPU
- All in one solution for AI in RISC-V
- 2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing
- 2D (vector graphics) & 3D GPU IP A GPU IP combining 3D and 2D rendering features with high performance, low power consumption, and minimum CPU load