Description: CORESDR provides a high performance interface to single data rate(SDR) synchronous dynamic random access memory(SDRAM) devices. CORESDR accepts read and write commands using the simple local bus interface, and translates these requests to the command sequences required by SDRAM devices. CORESDR also performs all initialization and refresh functions. CORESDR uses bank management techniques to monitor the status of each SDRAM bank. Banks are only opened or closed when necessary, minimizing access delays. Up to four banks can be managed at one time.