High-resolution Image Processing IP
The MAPI features its flexibility with a range of supported interfaces for data transmission. Image data can be transmitted without DRAM access via display or direct interface. Also, they can be read and written to/from the main memory via the AMBA3 AXI interface. MAPI can be used as a pre-processor for video encoder or as a post-processor for video decoder.
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Image Processing IP
- UHD Image Signal Processing (ISP) Pipeline
- Analog Front End IP for CMOS image processing applications
- FXAFE030HH0L is an Analog Front End IP for image processing applications. FXAFE030HH0L is fabricated in UMC 40 nm logic LP/HVT Low-K process to implement a signal processing solution for scanners, video and imaging applications. _x000D_
- Fast and efficient two-dimensional FFT core for image processing applications
- Video and Image Processing Suite
- Video and Image Processing Pack