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High-speed ultra-low noise LVDS Driver
Seamless Microsystems’ (SMI) SMLVDS55 is an LVDS I/O driver operating at 2.4 GHz in TSMC 55nm ULP process. Using a core supply voltage of 1.2V and an IO supply of 2.5V, the LVDS driver achieves ultra-low substrate and supply noise operation and satisfies TIA/EIA-644 specifications. The drivers find suitable applications for low noise environments.
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Block Diagram of the High-speed ultra-low noise LVDS Driver IP Core
LVDS IP
- TSMC GF LVDS Tx/Rx with optional CMOS I/O
- TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF