MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps, 2T/2L
HEVC/H.265, H.264 Multi format Codec IP for 4K 60fps
32-bit SPARC V8 processor
JESD204B Tx-Rx PHY IP, Silicon Proven in TSMC 28HPC+
intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
Qualcomm initiates global anti-trust complaint about Arm
EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
Understanding MACsec and Its Integration
Discover new Tessent UltraSight-V from Siemens EDA, and accelerate your RISC-V development.
Density Management in Analog Layout Design: Addressing Issues and Ensuring Consistency
ReRAM-Powered Edge AI: A Game-Changer for Energy Efficiency, Cost, and Security
Metanoia Licenses Cadence Tensilica ConnX 230 DSP for New SDR Platform
Cadence Silicon Success of UCIe IP on Samsung Foundry's 5nm Automotive Process
© 2024 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Suppliers, list your IPs for free.