Process Detector (For DVFS and monitoring process variation), TSMC N7
Interlaken, 100G, 12 Lanes
To help simplify your design decision process and accelerate your time to market, Altera?s Interlaken IP core on the Stratix V FPGA has been validated with Cavium's Octeon multicore processors. This interoperability assures solution connectivity upfront when you develop with Altera and Cavium.
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Interlaken IP
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- Interlaken Controller
- Interlaken Controller
- Interlaken Communication Controller