MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3E)
Interlaken, 100G, 12 Lanes
To help simplify your design decision process and accelerate your time to market, Altera?s Interlaken IP core on the Stratix V FPGA has been validated with Cavium's Octeon multicore processors. This interoperability assures solution connectivity upfront when you develop with Altera and Cavium.
View Interlaken, 100G, 12 Lanes full description to...
- see the entire Interlaken, 100G, 12 Lanes datasheet
- get in contact with Interlaken, 100G, 12 Lanes Supplier