Interlaken, 40G, 8 Lanes
To help simplify your design decision process and accelerate your time to market, Altera?s Interlaken IP core on the Stratix V FPGA has been validated with Cavium's Octeon multicore processors. This interoperability assures solution connectivity upfront when you develop with Altera and Cavium.
View Interlaken, 40G, 8 Lanes full description to...
- see the entire Interlaken, 40G, 8 Lanes datasheet
- get in contact with Interlaken, 40G, 8 Lanes Supplier
Interlaken IP
- Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
- Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- Interlaken Controller
- Interlaken Controller
- Interlaken Communication Controller