55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
IR DROP TSMC
The agileIRDROP consists of a voltage reference and comparator(s) set at different threshold levels for multi-level detection. The number of trigger outputs can be customized, and each threshold can be adjusted during operation to support DVFS operation. A four-output configuration is shown in the block diagram as reference.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic, and repeatable, leading to analog IP that is more verifiable, more robust and more reliable.
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