The JEDEC JESD204B IP core enables the deployment of both the Transmitter (TX) and Receiver (RX) controller modules for data transfers up to 6.125 Gbps in compliance with the latest JESD204B 2011 standard release. The JEDEC JESD204B IP core includes all main features required to support MCDA-ML applications. The JEDEC JESD204B IP core is a self-contained and fully tested solution and it is widely used today in a number of Tier1 applications for ASICs and FPGAs devices.
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