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JESD207 IP
JESD207 is a Radio Front End – Base Band Digital Parallel (RBDP) interface between a Radio Front-end integrated circuit (RFIC) and a Baseband integrated circuit (BBIC). This IP core together with DDR and PLL functionality integrated in the LatticeECP3™ FPGAs implements baseband (BB) side data and control plane paths. It can be used to connect to a radio front-end (RF) transceiver device with integrated analog to digital converter (ADC) and digital to analog converter (DAC).
The Lattice JESD207 IP core is fully compliant to the JESD207 JEDEC specification.
The Lattice JESD207 IP core is fully compliant to the JESD207 JEDEC specification.
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Block Diagram of the JESD207 IP IP Core
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