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Low Dropout (LDO) Capless Regulator 250mA - TSMC 12/16 FFC
1-VIA’s Linear Low-Dropout (LDO) voltage regulator IP is a capless LDO regulator which provides programmable precise voltage regulation across a wide range of input and output voltages. The LDO also has the capability to provide a wide range of output load current, 0-250mA, whilst being stable and maintaining an extremely low load transient and line transient regulation responses.
The regulator architecture provides high power supply rejection and low noise making it suitable for analog and RF applications.
The regulator architecture provides high power supply rejection and low noise making it suitable for analog and RF applications.
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LDO IP
- LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output
- LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output
- Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO
- Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
- LDO Linear Voltage Regulator
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL