CoreLPC is a low-pin-count (LPC) advanced peripheral bus (APB) component which accepts LPC host-side system interface commands to the APB-side software driver interface. Logic is included to assist in the software driver's implementation of the keyboard controller style (KCS) protocol. Serial interrupt request (SERIRQ) logic can also be included by asserting the SERIRQ_EN parameter. CoreLPC is APB3-compliant, enabling easy integration with systems built around the ARM Cortex-M1, Core8051s, or CoreABC microcontrollers.