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Low-Power 10-bit SAR ADC - 10 bits, 240kSPS, 8 multiplexed inputs LFoundry 0.15 μm
This macro-cell is a general purpose, 10-bit, 240kSPS, 8-multiplexed input Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) core designed for LFoundry 0.15µm LF150 CMOS technology STD (Standard) and LP (Low Power) process. The circuit occupies a small area and is optimized for low power consumption. The core is easily retargeted to any other CMOS technology with R-poly devices.
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Block Diagram of the Low-Power 10-bit SAR ADC - 10 bits, 240kSPS, 8 multiplexed inputs LFoundry 0.15 μm
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