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Low power, high speed, and high density configurable SRAM
Novelics’ coolSRAM-6T embedded memory IP is an ideal solution for ASIC, ASSP and System-on-Chip (SoC) applications with stringent power, speed or area requirements. Embedded coolSRAM-6T is designed to deliver the best performance and power characteristics at any given instance size.
The coolSRAM-6T IP is based on the production-proven, foundry-provided 6T SRAM cell and offers advanced leakage control features, near zero setup times and optional column and row redundancy.
Use of patented Novelics circuit technologies minimize leakage current and active power in both the memory core and the peripheral circuit. This is complemented by optional power management modes that can be applied to the entire memory core or restricted to specific memory blocks. In addition, the SRAM-6T has been optimized to meet the performance requirements of very high speed applications such as processor cache.
The coolSRAM-6T IP has been thoroughly silicon validated to ensure the highest level of manufacturability. The compilers have been extensively verified and characterized to help ensure the highest quality of deliverables.
The coolSRAM-6T IP is based on the production-proven, foundry-provided 6T SRAM cell and offers advanced leakage control features, near zero setup times and optional column and row redundancy.
Use of patented Novelics circuit technologies minimize leakage current and active power in both the memory core and the peripheral circuit. This is complemented by optional power management modes that can be applied to the entire memory core or restricted to specific memory blocks. In addition, the SRAM-6T has been optimized to meet the performance requirements of very high speed applications such as processor cache.
The coolSRAM-6T IP has been thoroughly silicon validated to ensure the highest level of manufacturability. The compilers have been extensively verified and characterized to help ensure the highest quality of deliverables.
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