Successive Approximation ADC - XFAB CMOS180
The key feature of this ADC is its low power consumption. This is achieved by using an energy efficient comparator and by making all circuitry dynamic. As a result, quiescent current in e.g. amplifiers is avoided, and the power consumption is fully proportional to the sample-rate. This property makes the ADC ideal for low duty-cycle sensor applications and other applications benefiting from low power consumption.
The converter can operate in both single-ended and differential mode, making it suitable for a broad range of applications
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Block Diagram of the Successive Approximation ADC - XFAB CMOS180
12-Bit Successive Approximation ADC IP
- This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.
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