English
Ceva-Waves Bluetooth 5.3 Low Energy Baseband Controller, software and profiles
You are here:
LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process
2.5V LVDS Receiver 8~135MHz, UMC 90nm SP process.
View LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process full description to...
- see the entire LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process datasheet
- get in contact with LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process Supplier
LVDS IP
- Bi-Directional LVDS with LVCMOS
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
- Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane