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Memory Compiler
Features
- 70-90% power reduction
- Unmatched performance
- Multi-technology support
- Tailored for design needs
- Smooth & flexible configuration
- Fast delivery
- No compromise on area
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Block Diagram of the Memory Compiler IP Core
Memory Compiler IP
- Ultra High-Speed Cache Memory Compiler
- TSMC CLN12FFC Ternary Content Addressable Memory Compiler
- TSMC CLN5FF Ternary Content Addressable Memory Compiler with Column Redundancy
- TSMC CLN7FF Pre-search and Pipeline Ternary Content Addressable Memory Compiler
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k