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Bluetooth low energy v5.4 Baseband Controller, Protocol Software Stack and Profiles IP
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Mini-LVDS TX and RX PHY
The T180BCDLVDSV1 IP is a mini-LVDS TX and RX PHY based on TSMC 180nm BCD process. It is suitable for the interface between the timing controller and column drivers.
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Block Diagram of the Mini-LVDS TX and RX PHY IP Core
LVDS IP
- Bi-Directional LVDS with LVCMOS
- TSMC 3nm (N3E) 1.5V LVDS
- TSMC 3nm (N3E) 1.2V LVDS Tx/Rx with 1.8V BGR
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- LVDS IO handling data rate up to 50Mbps with maximum loading 60pF
- Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane