The Innosilicon MIPI C-PHY provides a C-PHY in a single IP core, which integrates a compatible PHY that supports high speed data receiver, plus a MIPI® low-power low speed transceiver that supports data transfer in the bi-directional mode. The C-PHY was designed to coexist on the same IC pins as D-PHY so that dual-mode devices could be developed with low power signaling like D-PHY. This allows a seamless implementation allowing interface to C-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint for any configuration. It is optimized for high-speed applications with robust timing and small silicon area.
The C-PHY supports the electrical portion of MIPI C-PHY 1.1 standard, covering all transmission modes (ULP/LP/HS). The Innosilicon MIPI CPHY cost-effectively adds MIPI C-PHY 1.1 capability to any SoC used in communication and consumer electronics field.