English
MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6)
You are here:
MIPI SoundWire Slave Controller 1.1
The Total MIPI Soundwire IP Solution enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package that includes the Verilog RTL source code validated for compliance with the standard, a comprehensive test environment & compliance suite for validation of the IP, a Soundwire hardware development kit for FPGA prototyping and interoperability testing, a Soundwire protocol analyzer and the complete Soundwire software stack.
The IP is fully configurable for the number of (options like endpoint, audio channels etc.) to meet a wide range of audio applications. Soundwire is suited for small, very cost-sensitive audio peripherals such as amplifiers and microphones.
The IP is fully configurable for the number of (options like endpoint, audio channels etc.) to meet a wide range of audio applications. Soundwire is suited for small, very cost-sensitive audio peripherals such as amplifiers and microphones.
View MIPI SoundWire Slave Controller 1.1 full description to...
- see the entire MIPI SoundWire Slave Controller 1.1 datasheet
- get in contact with MIPI SoundWire Slave Controller 1.1 Supplier
Block Diagram of the MIPI SoundWire Slave Controller 1.1 IP Core
