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ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
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MIPI UniPro Controller IP core
The MIPI UniPro Controller IP core is fully compliant to UniPro Specification, it implements the UniPro Physical Adapter, Data Link, Network,and Transport layers. A variety of high-performance buses including AXI, AHB, PCI, or custom bus are available that provides a system interface to the UniPro controller. The Application Layer communicates to the Arasan IP through the selected bus interface. version 1.4.
The UniPro Controller supports all data types including control, isochronous, and bulk data. TC0 and TC1 traffic classes are handled on priority- based transmission. Other supported features include error detection and handling, data transmission pre-emption, and end-to end flow control.
The UniPro Controller supports all data types including control, isochronous, and bulk data. TC0 and TC1 traffic classes are handled on priority- based transmission. Other supported features include error detection and handling, data transmission pre-emption, and end-to end flow control.
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